James (JianQiang) Lü

According to our database¹, James (JianQiang) Lü authored at least 2 papers between 2001 and 2005.

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2005

First-Order Performance Prediction of Cache Memory with Wafer-Level3D Integration.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2005

2001

Experiences in Developing a Research-Focused Project Course: IP-Core Based IC Design Enabled by 3D Wafer Bonding.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Conference on Microelectronics Systems Education, 2001