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Jan-Erik Müller

Affiliations:
  • Siemens, Corporate Research and Development, Munich, Germany


According to our database1, Jan-Erik Müller authored at least 2 papers between 1997 and 1998.

Collaborative distances:
  • Dijkstra number2 of seven.
  • Erdős number3 of six.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1998
A small chip size 2 W, 62% efficient HBT MMIC for 3 V PCN applications.
[BibTeX]
[DOI]
Jan-Erik Müller
,
Peter Baureis
,
Otto Berger
,
Thomas Boettner
,
Nicola Bovolon
,
Rüdiger Schultheis
,
Gerhard Packeiser
,
Peter Zwicknagl
IEEE J. Solid State Circuits, 1998

1997
A GaAs HEMT MMIC chip set for automotive radar systems fabricated by optical stepper lithography.
[BibTeX]
[DOI]
Jan-Erik Müller
,
Thomas Grave
,
Heinz J. Siweris
,
Martin Kärner
,
Andre Schäfer
,
Harald Tischer
,
Henning Riechert
,
Lothar Schleicher
,
Ludger Verweyen
,
Axel Bangert
,
Walter Kellner
,
Thomas Meier
IEEE J. Solid State Circuits, 1997


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