Jaouhar Mouine

J. Circuits Syst. Comput., 2019

2018

Design optimisation procedure for digital mismatch compensation in latch comparators.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2018

Programmable Clock Delay for Hysteresis Adjustment in Dynamic Comparators.

[BibT_eX]

[DOI]

Proceedings of the 30th International Conference on Microelectronics, 2018

A Reusable Hybrid RISC Processor with Programmable Instruction Set.

[BibT_eX]

[DOI]

Hajer Najjar

Proceedings of the 15th International Multi-Conference on Systems, Signals & Devices, 2018

Buffers Sharing Switch Design Exploiting Dynamic Traffic Orientation in a NoC.

[BibT_eX]

[DOI]

Manel Lanzar

Proceedings of the 15th International Multi-Conference on Systems, Signals & Devices, 2018

2016

Development of a two-threshold-based fall detection algorithm for elderly health monitoring.

[BibT_eX]

[DOI]

Proceedings of the Tenth IEEE International Conference on Research Challenges in Information Science, 2016

Vivado HLS-based implementation of a fall detection decision core on an FPGA platform.

[BibT_eX]

[DOI]

Proceedings of the 11th International Design & Test Symposium, 2016

A new latch comparator with tunable hysteresis.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on Microelectronics, 2016

Design and implementation of a fall detection system on a Zynq board.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE/ACS International Conference of Computer Systems and Applications, 2016

A new programmable ALU architecture for hard-core processor.

[BibT_eX]

[DOI]

Hajer Najjar

Proceedings of the 13th International Multi-Conference on Systems, Signals & Devices, 2016

Virtual channel router architecture for Network on Chip with adaptive inter-port buffers sharing.

[BibT_eX]

[DOI]

Manel Langar

Proceedings of the 13th International Multi-Conference on Systems, Signals & Devices, 2016

2015

Design and implementation of an enhanced on chip mesh router.

[BibT_eX]

[DOI]

Manel Langar