Jarrod Eliason

According to our database1, Jarrod Eliason authored at least 3 papers between 2004 and 2005.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2005
FRAM Memory Technology - Advantages for Low Power, Fast Write, High Endurance Applications.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

An 8Mb 1T1C ferroelectric memory with zero cancellation and micro-granularity redundancy.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
A 64-Mb embedded FRAM utilizing a 130-nm 5LM Cu/FSG logic process.
IEEE J. Solid State Circuits, 2004


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