Javier Soto

According to our database, Javier Soto authored at least 4 papers between 2009 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

Self-adaptive hardware architecture with parallel processing capabilities and dynamic reconfiguration.

Javier Soto Vargas, Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany

Proceedings of the 16th Workshop on Adaptive and Reflective Middleware, 2017

2013

A self-adaptive hardware architecture with fault tolerance capabilities.

Javier Soto, Juan Manuel Moreno, Joan Cabestany

Neurocomputing, 2013

2011

Description of a Fault Tolerance System Implemented in a Hardware Architecture with Self-adaptive Capabilities.

Javier Soto, Juan Manuel Moreno, Joan Cabestany

Proceedings of the Advances in Computational Intelligence, 2011

2009

Implementation of a Dynamic Fault-Tolerance Scaling Technique on a Self-Adaptive Hardware Architecture.

Javier Soto Vargas, Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009