Jayapreetha Natesan

According to our database1, Jayapreetha Natesan authored at least 2 papers in 2004.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

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PhD thesis 
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Links

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Bibliography

2004
Shift Invert Coding (SINV) for Low Power VLSI.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

A Novel Bus Encoding Technique for Low Power VLSI.
Proceedings of the International Conference on Embedded Systems and Applications, 2004


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