Jebashini Ponnian

According to our database, Jebashini Ponnian authored at least 2 papers between 2012 and 2021.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of four.

2021

A New Systematic GDI Circuit Synthesis Using MUX Based Decomposition Algorithm and Binary Decision Diagram for Low Power ASIC Circuit Design.

Jebashini Ponnian, Senthil Pari, Uma Ramadass, Chee-Pun Ooi

Microelectron. J., 2021

2012

Systolic FIR Filter Design with Various Parallel Prefix Adders in FPGA: Performance Analysis.

R. Uma, Jebashini Ponnian

Proceedings of the International Symposium on Electronic System Design, 2012