Jeong Seop Lee

According to our database¹, Jeong Seop Lee authored at least 2 papers between 2023 and 2025.

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2025

A Design of a 100-MHz Fully Integrated Digital Pulse Width Modulation Three-Level Buck Converter Using Package Bond-Wire Inductor.

[BibT_eX]

[DOI]

IEEE Access, 2025

2023

A COT-based Highly Efficient Hybrid 3-Level Buck Converter for Next-Generation Memory Module Designs.

[BibT_eX]

[DOI]

Proceedings of the 20th International SoC Design Conference, 2023