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Jeong Seop Lee

Orcid: 0009-0004-4286-519X

According to our database1, Jeong Seop Lee authored at least 3 papers between 2023 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A 5-V Three-Level Dual-Path Hybrid Buck Converter With Passive-Damped Flying-Capacitor Stabilization for High DC-Resistance Inductors.
[BibTeX]
[DOI]
Jeong Seop Lee
,
Seung Wan Yoo
,
Woo Suk Choi
,
Seung Hwan Lim
,
Hyungju Park
,
Ji Won Kim
,
Kang-Yoon Lee
IEEE Access, 2026

2025
A Design of a 100-MHz Fully Integrated Digital Pulse Width Modulation Three-Level Buck Converter Using Package Bond-Wire Inductor.
[BibTeX]
[DOI]
Sung-Jae Lee
,
Ju Hyoung Kim
,
Yun Gwan Kim
,
Jeong Seop Lee
,
Ji Hoon Song
,
Dong Gyun Kim
,
JongWan Jo
,
YoungGun Pu
,
Kang-Yoon Lee
,
Jun-Eun Park
IEEE Access, 2025

2023
A COT-based Highly Efficient Hybrid 3-Level Buck Converter for Next-Generation Memory Module Designs.
[BibTeX]
[DOI]
Ji Won Kim
,
Jeong Seop Lee
,
Kang Yoon Lee
Proceedings of the 20th International SoC Design Conference, 2023


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