Ji Gu

According to our database, Ji Gu authored at least 17 papers between 2008 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Optimizing UAV Relay Systems for URLLC Under Interference Based on TD3 Algorithm.

Yicheng Wang, Tianqi Xiang, Jing Hut, Xiaojuan Wang, Ji Gu, Yuehong Gao, Xin Zhang

Proceedings of the 2025 IEEE Wireless Communications and Networking Conference (WCNC), 2025

2024

RIS-Assisted Multi-Carrier Secret Key Generation in Static Environments.

Ji Gu, Chongjun Ouyang, Xin Zhang, Hongwen Yang

IEEE Wirel. Commun. Lett., October, 2024

SharpEdge: A QoS-driven task scheduling scheme with blockchain in mobile edge computing.

Ji Gu, Yushi Liu, Xiaolong Xu

Concurr. Comput. Pract. Exp., August, 2024

2023

Computer vision aided beamforming for indoor scenario at sub-6GHz.

Tianqi Xiang, Ji Gu, Yicheng Wang, Yuehong Gao, Xin Zhang

Dataset, October, 2023

Reputation-Aware Supplier Assessment for Blockchain-Enabled Supply Chain in Industry 4.0.

Xiaolong Xu, Ji Gu, Hanzhi Yan, Wentao Liu, Lianyong Qi, Xiaokang Zhou

IEEE Trans. Ind. Informatics, April, 2023

2013

DLIC: Decoded loop instructions caching for energy-aware embedded processors.

Ji Gu, Hui Guo, Tohru Ishihara

ACM Trans. Embed. Comput. Syst., 2013

2012

A Case Study of Energy-efficient Loop Instruction Cache Design for Embedded Multitasking Systems.

Ji Gu, Tohru Ishihara

Proceedings of the SMARTGREENS 2012 - Proceedings of the 1st International Conference on Smart Grids and Green IT Systems, Porto, Portugal, 19, 2012

Loop instruction caching for energy-efficient embedded multitasking processors.

Ji Gu, Tohru Ishihara, Kyungsoo Lee

Proceedings of the IEEE 10th Symposium on Embedded Systems for Real-time Multimedia, 2012

2011

Application-specific design of low power instruction cache hierarchy for embedded processors.

Ji Gu

PhD thesis, 2011

An on-chip instruction cache design with one-bit tag for low-power embedded systems.

Ji Gu, Hui Guo, Patrick Li

Microprocess. Microsystems, 2011

Reducing Power and Energy Overhead in Instruction Prefetching for Embedded Processor Systems.

Ji Gu, Hui Guo

Int. J. Handheld Comput. Res., 2011

2010

An Energy Efficient Instruction Prefetching Scheme for Embedded Processors.

Ji Gu, Hui Guo

Proceedings of the Ubiquitous Computing and Multimedia Applications, 2010

Enabling large decoded instruction loop caching for energy-aware embedded processors.

Ji Gu, Hui Guo

Proceedings of the 2010 International Conference on Compilers, 2010

2009

An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction.

Ji Gu, Hui Guo

EURASIP J. Embed. Syst., 2009

ROBTIC: An On-chip Instruction Cache Design for Low Power Embedded Systems.

Ji Gu, Hui Guo, Patrick Li

Proceedings of the 15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2009

A Segmental Bus-invert Coding Method for Instruction Memory Data Bus Power Efficiency.

Ji Gu, Hui Guo

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Upscaling methods for a class of convection-diffusion equations with highly oscillating coefficients.

Weibing Deng, Ji Gu, Jianmin Huang

J. Comput. Phys., 2008