Jiann-Shiun Yuan

Patterns, January, 2024

2023

ProtEC: A Transformer Based Deep Learning System for Accurate Annotation of Enzyme Commission Numbers.

[BibT_eX]

[DOI]

Azwad Tamir

IEEE ACM Trans. Comput. Biol. Bioinform., 2023

Self-Supervised Graph Transformer for Deepfake Detection.

[BibT_eX]

[DOI]

Aminollah Khormali

CoRR, 2023

2022

AMPDeep: hemolytic activity prediction of antimicrobial peptides using transfer learning.

[BibT_eX]

[DOI]

BMC Bioinform., December, 2022

MolData, a molecular benchmark for disease and target based machine learning.

[BibT_eX]

[DOI]

Arash Firouzbakht

J. Cheminformatics, 2022

Mitigation of Black-Box Attacks on Intrusion Detection Systems-Based ML.

[BibT_eX]

[DOI]

Comput., 2022

2021

Resilient and Secure Hardware Devices Using ASL.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2021

ADD: Attention-Based DeepFake Detection Approach.

[BibT_eX]

[DOI]

Aminollah Khormali

Big Data Cogn. Comput., 2021

2020

Strong Logic Obfuscation with Low Overhead against IC Reverse Engineering Attacks.

[BibT_eX]

[DOI]

Jiann-Shuin Yuan

Pramod Subramanyan

ACM Trans. Design Autom. Electr. Syst., 2020

A scalable and reconfigurable in-memory architecture for ternary deep spiking neural network with ReRAM based neurons.

[BibT_eX]

[DOI]

Neurocomputing, 2020

Artificial Intelligence for COVID-19 Drug Discovery and Vaccine Development.

[BibT_eX]

[DOI]

Frontiers Artif. Intell., 2020

Developing a Robust Defensive System against Adversarial Examples Using Generative Adversarial Networks.

[BibT_eX]

[DOI]

Big Data Cogn. Comput., 2020

TranScreen: Transfer Learning on Graph-Based Anti-Cancer Virtual Screening Model.

[BibT_eX]

[DOI]

Aminollah Khormali

Julia Webb

Big Data Cogn. Comput., 2020

Substrate Bias Effect on Dynamic Characteristics of a Monolithically Integrated GaN Half-Bridge.

[BibT_eX]

[DOI]

Wen Yang

Balakrishnan Krishnan

An-Jye Tzou

Wen-Kuan Yeh

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

ESD Robustness of GaN-on-Si Power Devices under Substrate Biases by means of TLP/VFTLP Tests.

[BibT_eX]

[DOI]

Wen Yang

Nicholas Stoll

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019

Utilizing Transfer Learning and Homomorphic Encryption in a Privacy Preserving and Secure Biometric Recognition System.

[BibT_eX]

[DOI]

Comput., 2019

RazorNet: Adversarial Training and Noise Training on a Deep Neural Network Fooled by a Shallow Neural Network.

[BibT_eX]

[DOI]

Big Data Cogn. Comput., 2019

Low-Side GaN Power Device Dynamic Ron Characteristics Under Different Substrate Biases.

[BibT_eX]

[DOI]

Wen Yang

Balakrishnan Krishnan

Patrick Shea

Proceedings of the IEEE International Reliability Physics Symposium, 2019

Noise Injection Adaption: End-to-End ReRAM Crossbar Non-ideal Effect Adaption for Neural Network Mapping.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

Analysis and Simulation of Capacitor-Less ReRAM-Based Stochastic Neurons for the in-Memory Spiking Neural Network.

[BibT_eX]

[DOI]

IEEE Trans. Biomed. Circuits Syst., 2018

Leveraging Image Representation of Network Traffic Data and Transfer Learning in Botnet Detection.

[BibT_eX]

[DOI]

Big Data Cogn. Comput., 2018

An Experimental Evaluation of Fault Diagnosis from Imbalanced and Incomplete Data for Smart Semiconductor Manufacturing.

[BibT_eX]

[DOI]

Big Data Cogn. Comput., 2018

Anomaly Generation Using Generative Adversarial Networks in Host-Based Intrusion Detection.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE Annual Ubiquitous Computing, 2018

Resilient AES Against Side-Channel Attack Using All-Spin Logic.

[BibT_eX]

[DOI]

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

ECG Arrhythmia Classification Using Transfer Learning from 2- Dimensional Deep CNN Features.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

2017

Tunnel FET Current Mode Logic for DPA-Resilient Circuit Designs.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2017

A 12-Bit Ultra-Low Voltage Noise Shaping Successive-Approximation Register Analogto-Digital Converter Using Emerging TFETs.

[BibT_eX]

[DOI]

J. Low Power Electron., 2017

Security Protection for Magnetic Tunnel Junction.

[BibT_eX]

[DOI]

CoRR, 2017

Security Analysis of Tunnel Field-Effect Transistor for Low Power Hardware.

[BibT_eX]

[DOI]

CoRR, 2017

Logic Obfuscation against IC Reverse Engineering Attacks Using PLGs.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Leveraging All-Spin Logic to Improve Hardware Security.

[BibT_eX]

[DOI]

Deliang Fan

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Security analysis of computing systems from circuit-architectural perspective.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Dependable and Secure Computing, 2017

Capacitor-less RRAM-based stochastic neuron for event-based unsupervised learning.

[BibT_eX]

[DOI]

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

2016

Ultra-Low Power Successive Approximation Analog-to-Digital Converter Using Emerging Tunnel Field Effect Transistor Technology.

[BibT_eX]

[DOI]

J. Low Power Electron., 2016

Emerging Technology-Based Design of Primitives for Hardware Security.

[BibT_eX]

[DOI]

Kaveh Shamsi

Pierre-Emmanuel Gaillardon

ACM J. Emerg. Technol. Comput. Syst., 2016

Leverage Emerging Technologies For DPA-Resilient Block Cipher Design.

[BibT_eX]

[DOI]

Kaveh Shamsi

François-Xavier Standaert

Yier Jin

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

Process and temperature robust voltage multiplier design for RF energy harvesting.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2015

2014

Leveraging Emerging Technology for Hardware Security - Case Study on Silicon Nanowire FETs and Graphene SymFETs.

[BibT_eX]

[DOI]

Pierre-Emmanuel Gaillardon

Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013

Experimental evaluation of hot electron reliability on differential Clapp-VCO.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2013

2012

RF stress effects on CMOS LC-loaded VCO reliability evaluated by experiments.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2012

Examination of hot carrier effects of the AlGaAs/InGaAs pHEMT through device simulation.

[BibT_eX]

[DOI]

Jason B. Steighner

Microelectron. Reliab., 2012

2011

NBTI reliability on high-k metal-gate SiGe transistor and circuit performances.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2011

Thermal reliability of VCO using InGaP/GaAs HBTs.

[BibT_eX]

[DOI]

Xiang Liu

Microelectron. Reliab., 2011

Evaluation of gate oxide breakdown effect on cascode class E power amplifier performance.

[BibT_eX]

[DOI]

Karan Kutty

Shuyu Chen

Microelectron. Reliab., 2011

2010

Design of Asynchronous Circuits for High Soft Error Tolerance in Deep Submicrometer CMOS Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2010

Impact of strain on hot electron reliability of dual-band power amplifier and integrated LNA-mixer RF performances.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2010

Voltage stress effect on class AB power amplifier and mixed-signal sample-hold circuit.

[BibT_eX]

[DOI]

J. Ma

Microelectron. Reliab., 2010

Electro-thermal stress effect on InGaP/GaAs heterojunction bipolar low-noise amplifier performance.

[BibT_eX]

[DOI]

Xiang Liu

Microelectron. Reliab., 2010

2008

InGaP/GaAs heterojunction bipolar transistor and RF power amplifier reliability.

[BibT_eX]

[DOI]

Xiang Liu

Microelectron. Reliab., 2008

PMOS breakdown effects on digital circuits - Modeling and analysis.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2008

2006

Study of performance degradations in DC-DC converter due to hot carrier stress by simulation.

[BibT_eX]

[DOI]

Chuanzhao Yu

L. Jiang

Microelectron. Reliab., 2006

Energy-Aware Dual-Rail Bit-Wise Completion Pipelined Arithmetic Circuit Design.

[BibT_eX]

[DOI]

J. Low Power Electron., 2006

Improving power-awareness of pipelined array multipliers using two-dimensional pipeline gating and its application on FIR design.

[BibT_eX]

[DOI]

Ronald F. DeMara

Integr., 2006

2005

Teaching low-power electronic design in electrical and computer engineering.

[BibT_eX]

[DOI]

IEEE Trans. Educ., 2005

Dynamic Active-bit Detection and Operands Exchange for Designing Energy-aware Asynchronous Multipliers.

[BibT_eX]

Proceedings of the 2005 International Conference on Computer Design, 2005

2004

Teaching asynchronous design in digital integrated circuits.

[BibT_eX]

[DOI]

Weidong Kuang

IEEE Trans. Educ., 2004

Optimization of NULL convention self-timed circuits.

[BibT_eX]

[DOI]

Integr., 2004

2003

High Throughput Power-Aware FIR Filter Design Based on Fine-Grain Pipelining Multipliers and Adders.

[BibT_eX]

[DOI]

Ronald F. DeMara

Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Power-aware pipelined multiplier design based on 2-dimensional pipeline gating.

[BibT_eX]

[DOI]

Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

2002

NULL convention multiply and accumulate unit with conditional rounding, scaling, and saturation.

[BibT_eX]

[DOI]

J. Syst. Archit., 2002

2001

Delay-insensitive gate-level pipelining.

[BibT_eX]

[DOI]

Integr., 2001

2000

Overview of SiGe Technology Modeling and Application.

[BibT_eX]

[DOI]

Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

1991

Testing the impact of process defects on ECL power-delay performance.

[BibT_eX]

[DOI]