Jin Sha

Honghao Wei

Jiahao Hu

IEEE Trans. Ind. Electron., June, 2024

RF Fingerprinting Identification in Low SNR Scenarios for Automatic Identification System.

[BibT_eX]

[DOI]

Qi Jiang

IEEE Trans. Wirel. Commun., March, 2024

2023

1+1 <2: Efficient Automatic Standard Cell Sharing Between Digital VLSI Designs for Area Saving.

[BibT_eX]

[DOI]

Lang Feng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

A Discrete Average Current Mode Control CCM Boost PFC Converter With Hybrid Pulse Train Modulation and Dual Edge Modulation.

[BibT_eX]

[DOI]

Jiahao Hu

Honghao Wei

IEEE Trans. Ind. Electron., October, 2023

The Use of SNN for Ultralow-Power RF Fingerprinting Identification With Attention Mechanisms in VDES-SAT.

[BibT_eX]

[DOI]

Qi Jiang

IEEE Internet Things J., September, 2023

An Improved Critical Set for List Decoding of Polar Codes.

[BibT_eX]

[DOI]

Heng Liu

Xiumin Wang

IEEE Commun. Lett., September, 2023

Discrete Extended-Phase-Shift Control for Dual-Active-Bridge DC-DC Converter With Fast Dynamic Response.

[BibT_eX]

[DOI]

Lirong Chen

Guohua Zhou

IEEE Trans. Ind. Electron., June, 2023

An Adaptive Chase-Pyndiah Algorithm for Turbo Product Codes.

[BibT_eX]

[DOI]

IEEE Commun. Lett., April, 2023

RF Fingerprinting Identification Based on Spiking Neural Network for LEO-MIMO Systems.

[BibT_eX]

[DOI]

Qi Jiang

IEEE Wirel. Commun. Lett., 2023

2022

Embedded Bidirectional Buck-Boost Converter in Half Bridge Class-D Audio Amplifier for Suppressing Bus Voltage Pumping.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2022

2021

Efficient HLS Implementation of Fast Linear Discriminant Analysis Classifier.

[BibT_eX]

[DOI]

Dezhi Peng

IEEE Embed. Syst. Lett., 2021

2020

Pulse Train Control Strategy for CCM Boost PFC Converter With Improved Dynamic Response and Unity Power Factor.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2020

2019

A Digital Pulse Train Controlled High Power Factor DCM Boost PFC Converter Over a Universal Input Voltage Range.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2019

Evaluation and Suppression of a Low-Frequency Output Voltage Ripple of a Single-Stage AC-DC Converter Based on an Output Impedance Model.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2019

Efficient Channel Estimator With Angle-Division Multiple Access.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Joint Detection and Decoding of Polar-Coded OFDM-IDMA Systems.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Satellite Observations of Wind Wake and Associated Oceanic Thermal Responses: A Case Study of Hainan Island Wind Wake.

[BibT_eX]

[DOI]

Remote. Sens., 2019

FPGA-based low-complexity high-throughput real-time hardware accelerator for robust watermarking.

[BibT_eX]

[DOI]

Hangqi Ge

J. Real Time Image Process., 2019

Prune Deep Neural Networks With the Modified L<sub>1/2</sub> Penalty.

[BibT_eX]

[DOI]

Jing Chang

IEEE Access, 2019

Symbol-Based Algorithms for Decoding Binary LDPC Codes with Higher-Order Modulations.

[BibT_eX]

[DOI]

Jingbo Liu

Jingyang Yuan

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018

A Stage-Combined Belief Propagation Decoder for Polar Codes.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2018

Dispersed Array LDPC Codes and Decoder Architecture for NAND Flash Memory.

[BibT_eX]

[DOI]

Wei Shao

IEEE Trans. Circuits Syst. II Express Briefs, 2018

Multi-column parallel QC-LDPC decoder architecture for NAND flash memory.

[BibT_eX]

[DOI]

Wei Shen

Cheng Chen

IEICE Electron. Express, 2018

Improved gradient descent bit flipping decoder for LDPC codes on BSC channel.

[BibT_eX]

[DOI]

Dao Ren

IEICE Electron. Express, 2018

A low complexity LDPC-BCH concatenated decoder for NAND flash memory.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2018

4.7-Gb/s LDPC Decoder on GPU.

[BibT_eX]

[DOI]

Jinyang Yuan

IEEE Commun. Lett., 2018

Polar-Coded Forward Error Correction for MLC NAND Flash Memory Polar FEC for NAND Flash Memory.

[BibT_eX]

[DOI]

CoRR, 2018

Polar-coded forward error correction for MLC NAND flash memory.

[BibT_eX]

[DOI]

Sci. China Inf. Sci., 2018

2017

High-Speed Parallel LFSR Architectures Based on Improved State-Space Transformations.

[BibT_eX]

[DOI]

Guanghui Hu

IEEE Trans. Very Large Scale Integr. Syst., 2017

Optimized sorting network for successive cancellation list decoding of polar codes.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2017

Frozen bits selection for polar codes based on simulation and BP decoding.

[BibT_eX]

[DOI]

Jingbo Liu

IEICE Electron. Express, 2017

An access pattern based adaptive mapping function for GPGPU scratchpad memory.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2017

An efficient implementation of 2D convolution in CNN.

[BibT_eX]

[DOI]

Jing Chang

IEICE Electron. Express, 2017

Automatic classification of leukocytes using deep neural network.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on ASIC, 2017

The VLSI architecture for channel estimation based on ADMA.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on ASIC, 2017

Joint detection and decoding for polar-coded OFDM-IDMA systems.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on ASIC, 2017

Joint detection and decoding for non-binary LDPC coded MIMO systems.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016

A Peak-Capacitor-Current Pulse-Train-Controlled Buck Converter With Fast Transient Response and a Wide Load Range.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2016

Influences of an Aluminum Covering Layer on the Performance of Cross-Like Hall Devices.

[BibT_eX]

[DOI]

Sensors, 2016

An Efficient FPGA Implementation for 2-D MUSIC Algorithm.

[BibT_eX]

[DOI]

Circuits Syst. Signal Process., 2016

Beyond 100Gbps Encoder Design for Staircase Codes.

[BibT_eX]

[DOI]

Guanghui Hu

Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

Stage-combined belief propagation decoding of polar codes.

[BibT_eX]

[DOI]

Jun Lin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A high throughput belief propagation decoder architecture for polar codes.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

Control Pulse Combination-Based Analysis of Pulse Train Controlled DCM Switching DC-DC Converters.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2015

Performance Comparison of Cross-Like Hall Plates with Different Covering Layers.

[BibT_eX]

[DOI]

Sensors, 2015

Tail-biting code: A modification to staircase code for high-speed networking.

[BibT_eX]

[DOI]

Guanghui Hu

Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

A stage-reduced low-latency successive cancellation decoder for polar codes.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

2014

Variable-On-Time-Controlled Critical-Conduction-Mode Flyback PFC Converter.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2014

Effects of Circuit Parameters on Dynamics of Current-Mode-Pulse-Train-Controlled Buck Converter.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2014

A more accurate circuit model for CMOS Hall cross with non-linear resistors and JFETs.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

Efficient symbol reliability based decoding for QCNB-LDPC codes.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Hardware architecture for list successive cancellation polar decoder.

[BibT_eX]

[DOI]

Xiaohu You

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

Memory efficient EMS decoding for non-binary LDPC codes.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

Unified Architecture for Reed-Solomon Decoder Combined With Burst-Error Correction.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2012

Nonbinary LDPC Code Decoder Architecture With Efficient Check Node Processing.

[BibT_eX]

[DOI]

Kai He

IEEE Trans. Circuits Syst. II Express Briefs, 2012

Efficient EMS decoding for non-binary LDPC codes.

[BibT_eX]

[DOI]

Leixin Zhou

Proceedings of the International SoC Design Conference, 2012

Efficient network for non-binary QC-LDPC decoder.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Memory efficient column-layered decoder design for non-binary LDPC codes.

[BibT_eX]

[DOI]

Kai He

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

Efficient Reed-Solomon based LDPC decoders.

[BibT_eX]

[DOI]

Sang-Min Kim

Proceedings of the International SoC Design Conference, 2011

Memory efficient decoder design of nonbinary LDPC codes.

[BibT_eX]

[DOI]

Kai He