Joaquim Ranyere S. de Oliveira

According to our database, Joaquim Ranyere S. de Oliveira authored at least 2 papers between 2015 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2019

Performance and Energy Efficiency Analysis of Reverse Time Migration on a FPGA Platform.

João Carlos Bittencourt, João Marcelo Souza, Adhvan Furtado, Erick Giovani Sperandio Nascimento, Wagner Luiz Alves de Oliveira, Anderson Nascimento, Leonardo Fialho, Joaquim Ranyere S. de Oliveira, Rodrigo Tutu, Georgina Rojas, Laue Rami Jesus, André Lima

Proceedings of the 2019 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing, 2019

2015

VLSI architecture design and implementation of a LDPC encoder for the IEEE 802.22 WRAN standard.

Nelson Alves Ferreira Neto, Joaquim Ranyere S. de Oliveira, Wagner Luiz Alves de Oliveira, João Carlos N. Bittencourt

Proceedings of the 25th International Workshop on Power and Timing Modeling, 2015