Joaquim Ranyere S. de Oliveira

According to our database1, Joaquim Ranyere S. de Oliveira authored at least 2 papers between 2015 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Performance and Energy Efficiency Analysis of Reverse Time Migration on a FPGA Platform.
Proceedings of the 2019 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing, 2019

2015
VLSI architecture design and implementation of a LDPC encoder for the IEEE 802.22 WRAN standard.
Proceedings of the 25th International Workshop on Power and Timing Modeling, 2015


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