Junchao Zhang

Affiliations:

Chinese Academy of Sciences (CAS), Advanced Micro-System Group National, Key Laboratory of Computer Architecture, Institute of Computing Technology, China

According to our database¹, Junchao Zhang authored at least 19 papers between 2004 and 2011.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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PhD thesis

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Links

On csauthors.net:

Bibliography

2011

High-efficient architecture of Godson-T many-core processor.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE Hot Chips 23 Symposium (HCS), 2011

2010

Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010

2009

Godson-T: An Efficient Many-Core Architecture for Parallel Program Executions.

[BibT_eX]

[DOI]

J. Comput. Sci. Technol., 2009

Study on Fine-Grained Synchronization in Many-Core Architecture.

[BibT_eX]

[DOI]

Proceedings of the 10th ACIS International Conference on Software Engineering, 2009

Architectural support for cilk computations on many-core architectures.

[BibT_eX]

[DOI]

Guoping Long

Dongrui Fan

Junchao Zhang

Proceedings of the 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2009

Data Management: The Spirit to Pursuit Peak Performance on Many-Core Processor.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2009

Evaluation Method of Synchronization for Shared-Memory On-Chip Many-Core Processor.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2009

A Synchronization-Based Alternative to Directory Protocol.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2009

High Performance Matrix Multiplication on Many Cores.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2009 Parallel Processing, 2009

Characterizing and Understanding the Bandwidth Behavior of Workloads on Multi-core Processors.

[BibT_eX]

[DOI]

Guoping Long

Dongrui Fan

Junchao Zhang

Proceedings of the Euro-Par 2009 Parallel Processing, 2009

Software and Hardware Cooperate for 1-D FFT Algorithm Optimization on Multicore Processors.

[BibT_eX]

[DOI]

Yongbin Zhou

Junchao Zhang

Dongrui Fan

Proceedings of the Ninth IEEE International Conference on Computer and Information Technology, 2009

Design of New Hash Mapping Functions.

[BibT_eX]

[DOI]

Proceedings of the Ninth IEEE International Conference on Computer and Information Technology, 2009

2008

Experience on optimizing irregular computation for memory hierarchy in manycore architecture.

[BibT_eX]

[DOI]

Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2008

A Performance Model of Dense Matrix Operations on Many-Core Architectures.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2008, 2008

2007

Design and Implementation of Floating Point Stack on General RISC Architecture.

[BibT_eX]

[DOI]

Proceedings of the 15th Euromicro International Conference on Parallel, 2007

Circuit implementation of floating point range reduction for trigonometric functions.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Optimized Register Renaming Scheme for Stack-Based x86 Operations.

[BibT_eX]

[DOI]

Proceedings of the Architecture of Computing Systems, 2007

2005

A Register Allocation Framework for Banked Register Files with Access Constraints.

[BibT_eX]

[DOI]

Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

2004

An Overview of the Open Research Compiler.

[BibT_eX]

[DOI]

Proceedings of the Languages and Compilers for High Performance Computing, 2004

Junchao Zhang

Timeline

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On csauthors.net:

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