Chengyong Wu

According to our database, Chengyong Wu authored at least 33 papers between 2003 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2017

Two-Level Task Scheduling for Irregular Applications on GPU Platform.

Jing Li, Lei Liu, Yuan Wu, Xiaobing Feng, Chengyong Wu

Int. J. Parallel Program., 2017

2016

Rethinking Memory Management in Modern Operating System: Horizontal, Vertical or Random?

Lei Liu, Yong Li, Chen Ding, Hao Yang, Chengyong Wu

IEEE Trans. Computers, 2016

Pragma Directed Shared Memory Centric Optimizations on GPUs.

Jing Li, Lei Liu, Yuan Wu, Xiang-Hua Liu, Yi Gao, Xiaobing Feng, Chengyong Wu

J. Comput. Sci. Technol., 2016

2015

A Small-Footprint Accelerator for Large-Scale Neural Networks.

Tianshi Chen, Shijin Zhang, Shaoli Liu, Zidong Du, Tao Luo, Yuan Gao, Junjie Liu, Dongsheng Wang, Chengyong Wu, Ninghui Sun, Yunji Chen, Olivier Temam

ACM Trans. Comput. Syst., 2015

Leveraging the Error Resilience of Neural Networks for Designing Highly Energy Efficient Accelerators.

Zidong Du, Avinash Lingamneni, Yunji Chen, Krishna V. Palem, Olivier Temam, Chengyong Wu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Practical Iterative Optimization for the Data Center.

Shuangde Fang, Wenwen Xu, Yang Chen, Lieven Eeckhout, Olivier Temam, Yunji Chen, Chengyong Wu, Xiaobing Feng

ACM Trans. Archit. Code Optim., 2015

A High-Throughput Neural Network Accelerator.

Tianshi Chen, Zidong Du, Ninghui Sun, Jia Wang, Chengyong Wu, Yunji Chen, Olivier Temam

IEEE Micro, 2015

Neuromorphic accelerators: a comparison between neuroscience and machine-learning approaches.

Zidong Du, Daniel D. Ben-Dayan Rubin, Yunji Chen, Liqiang He, Tianshi Chen, Lei Zhang, Chengyong Wu, Olivier Temam

Proceedings of the 48th International Symposium on Microarchitecture, 2015

Retraining-based timing error mitigation for hardware neural networks.

Jiachao Deng, Yuntan Fang, Zidong Du, Ying Wang, Huawei Li, Olivier Temam, Paolo Ienne, David Novo, Xiaowei Li, Yunji Chen, Chengyong Wu

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

BPM/BPM+: Software-based dynamic memory partitioning mechanisms for mitigating DRAM bank-/channel-level interferences in multicore systems.

Lei Liu, Zehan Cui, Yong Li, Yungang Bao, Mingyu Chen, Chengyong Wu

ACM Trans. Archit. Code Optim., 2014

Performance Portability Across Heterogeneous SoCs Using a Generalized Library-Based Approach.

Shuangde Fang, Zidong Du, Yuntan Fang, Yuanjie Huang, Yang Chen, Lieven Eeckhout, Olivier Temam, Huawei Li, Yunji Chen, Chengyong Wu

ACM Trans. Archit. Code Optim., 2014

Finding representative sets of optimizations for adaptive multiversioning applications.

Lianjie Luo, Yang Chen, Chengyong Wu, Shun Long, Grigori Fursin

CoRR, 2014

Going vertical in memory management: Handling multiplicity by multi-policy.

Lei Liu, Yong Li, Zehan Cui, Yungang Bao, Mingyu Chen, Chengyong Wu

Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

A low-cost memory interface for high-throughput accelerators.

Jing Huang, Yuanjie Huang, Olivier Temam, Paolo Ienne, Yunji Chen, Chengyong Wu

Proceedings of the 2014 International Conference on Compilers, 2014

DianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning.

Tianshi Chen, Zidong Du, Ninghui Sun, Jia Wang, Chengyong Wu, Yunji Chen, Olivier Temam

Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2014

Leveraging the error resilience of machine-learning applications for designing highly energy efficient accelerators.

Zidong Du, Krishna V. Palem, Lingamneni Avinash, Olivier Temam, Yunji Chen, Chengyong Wu

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

Elastic CGRAs.

Yuanjie Huang, Paolo Ienne, Olivier Temam, Yunji Chen, Chengyong Wu

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

2012

Deconstructing iterative optimization.

Yang Chen, Shuangde Fang, Yuanjie Huang, Lieven Eeckhout, Grigori Fursin, Olivier Temam, Chengyong Wu

ACM Trans. Archit. Code Optim., 2012

SWAP: Parallelization through Algorithm Substitution.

Hengjie Li, Wenting He, Yang Chen, Lieven Eeckhout, Olivier Temam, Chengyong Wu

IEEE Micro, 2012

Iterative optimization for the data center.

Yang Chen, Shuangde Fang, Lieven Eeckhout, Olivier Temam, Chengyong Wu

Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012

A software memory partition approach for eliminating bank-level interference in multicore systems.

Lei Liu, Zehan Cui, Mingjie Xing, Yungang Bao, Mingyu Chen, Chengyong Wu

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

An Improved Clipping Scheme Based on TR for PAPR Reduction in OFDM Systems.

Chengyong Wu, You Lu, Guanghui Liu

Proceedings of the 12th IEEE International Conference on Computer and Information Technology, 2012

Novel Iterative Channel Estimation Method for DTMB System.

You Lu, Chengyong Wu, Guanghui Liu

Proceedings of the 12th IEEE International Conference on Computer and Information Technology, 2012

2011

How sensitive is processor customization to the workload's input datasets?

Maximilien Breughe, Zheng Li, Yang Chen, Stijn Eyerman, Olivier Temam, Chengyong Wu, Lieven Eeckhout

Proceedings of the IEEE 9th Symposium on Application Specific Processors, 2011

2010

Evaluating iterative optimization across 1000 datasets.

Yang Chen, Yuanjie Huang, Lieven Eeckhout, Grigori Fursin, Liang Peng, Olivier Temam, Chengyong Wu

Proceedings of the 2010 ACM SIGPLAN Conference on Programming Language Design and Implementation, 2010

2009

Modeling Nondeterministic Feature with Petri Net for Network Protocol in Interoperability Testing.

Hua Li, Xinming Ye, Chengyong Wu, Chengbao Hang, Lingling Wang

Proceedings of the CSIE 2009, 2009 WRI World Congress on Computer Science and Information Engineering, March 31, 2009

2008

Global Tiling for Communication Minimal Parallelization on Distributed Memory Systems.

Lei Liu, Li Chen, Chengyong Wu, Xiaobing Feng

Proceedings of the Euro-Par 2008, 2008

Diva: A dataflow programming model and its runtime support in Java virtual machine.

Yang Chen, Bin Fan, Lujie Zhong, Chengyong Wu

Proceedings of the 13th Asia-Pacific Computer Systems Architecture Conference, 2008

2005

Optimizing Packet Accesses for a Domain Specific Language on Network Processors.

Tao Liu, Xiao-Feng Li, Lixia Liu, Chengyong Wu, Roy Ju

Proceedings of the Languages and Compilers for Parallel Computing, 2005

A Register Allocation Framework for Banked Register Files with Access Constraints.

Feng Zhou, Junchao Zhang, Chengyong Wu, Zhaoqing Zhang

Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

2004

Efficient Modeling of Itanium Architecture during Instruction Scheduling using Extended Finite State Automata.

Dong-yuan Chen, Lixia Liu, Roy Dz-Ching Ju, Chen Fu, Shuxin Yang, Chengyong Wu

J. Instr. Level Parallelism, 2004

An Overview of the Open Research Compiler.

Chengyong Wu, Ruiqi Lian, Junchao Zhang, Roy Ju, Sun Chan, Lixia Liu, Xiaobing Feng, Zhaoqing Zhang

Proceedings of the Languages and Compilers for High Performance Computing, 2004

2003

Efficient Resource Management during Instruction Scheduling for the EPIC Architecture.

Dong-yuan Chen, Lixia Liu, Chen Fu, Shuxin Yang, Chengyong Wu, Roy Dz-Ching Ju

Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques (PACT 2003), 27 September, 2003