Jyun-Sian Jhou

According to our database, Jyun-Sian Jhou authored at least 2 papers between 2009 and 2010.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2010

Built-in self at-speed delay binning and calibration mechanism in wireless test platform.

Chen-I Chung, Jyun-Sian Jhou, Ching-Hwa Cheng

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

Functional Built-In Delay Binning and Calibration Mechanism for On-Chip at-Speed Self Test.

Chen-I Chung, Jyun-Sian Jhou, Ching-Hwa Cheng, Sih-Yan Li

Proceedings of the Eighteentgh Asian Test Symposium, 2009