Keerthija Puli

According to our database1, Keerthija Puli authored at least 3 papers between 2023 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
Design of Novel Systolic Array based NTT for CRYSTALS-Kyber scheme.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

2023
Design of Energy Efficient and Low Delay Posit Multiplier.
Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

Design of Low Power ALU for RISC-VISA.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023


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