Kenji Murao

According to our database1, Kenji Murao authored at least 8 papers between 1994 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2010
Low-Voltage, Wide-Common-Mode-Range and High-CMRR CMOS OTA.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

2008
Design of CMOS OTAs for Low-Voltage and Low-Power Application.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

Predicting fault-prone modules based on metrics transitions.
Proceedings of the 2008 Workshop on Defects in Large Software Systems, 2008

Design of CNN cell with low-power variable-gm OTA and its application.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2006
A Switched-Voltage High-Accuracy Sample/Hold Circuit.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2001
A high-accuracy digital readout technique for humidity sensor.
IEEE Trans. Instrum. Meas., 2001

2000
Gain- and offset-compensated non-inverting SC circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1994
Switched capacitor circuit for 1/f noise generation using a power-law circuit.
Int. J. Circuit Theory Appl., 1994


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