Kiseon Cho

According to our database¹, Kiseon Cho authored at least 2 papers between 2000 and 2002.

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2002

Design Methodology of a 32-bit Arithmetic Logic Unit with an Adaptive Leaf-cell Based Layout Technique.

[BibT_eX]

[DOI]

VLSI Design, 2002

2000

Design of novel macro-cells for next generation ASIC cell library.

[BibT_eX]

[DOI]

Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000