Kishore Yalamanchili

According to our database, Kishore Yalamanchili authored at least 4 papers between 2008 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

SHMEM+: A multilevel-PGAS programming model for reconfigurable supercomputing.

Vikas Aggarwal, Alan D. George, Changil Yoon, Kishore Yalamanchili, Herman Lam

ACM Trans. Reconfigurable Technol. Syst., 2011

2009

Bridging parallel and reconfigurable computing with multilevel PGAS and SHMEM+.

Vikas Aggarwal, Alan D. George, Kishore Yalamanchili, Changil Yoon, Herman Lam, Greg Stitt

Proceedings of the Third International Workshop on High-Performance Reconfigurable Computing Technology and Applications, 2009

Low Energy Tree Based Network on Chip Architectures Using Homogeneous Routers for Bandwidth and Latency Constrained Multimedia Applications.

Deepak Majeti, Aditya Pasalapudi, Kishore Yalamanchili

Proceedings of the Second International Conference on Emerging Trends in Engineering & Technology, 2009

2008

Design of Optimal Architectures Using Homogeneous Routers for Application Specific Network on Chip.

Kishore Yalamanchili, Aditya Pasalapudi, Deepak Majeti, V. Sunitha

Proceedings of the First International Conference on Emerging Trends in Engineering and Technology, 2008