Komaragiri Sai Vishwanath Rohit

According to our database1, Komaragiri Sai Vishwanath Rohit authored at least 2 papers between 2025 and 2026.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Triple-Packed Posit MAC: Low-Bitwidth Inference via Tri-Product DSP48E2 Overpacking for CNNs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025
VPSA: A Vectored Processing Element configured Systolic Array Architecture Generator.
Proceedings of the 28th Euromicro Conference on Digital System Design, 2025


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