Kuan Jen Lin

Orcid: 0000-0001-9639-7855

According to our database1, Kuan Jen Lin authored at least 16 papers between 2004 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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On csauthors.net:

Bibliography

2022
Hardware Accelerator for Symmetric Permutation-Diffusion Image Encryption.
Proceedings of the 11th IEEE Global Conference on Consumer Electronics, 2022

2018
ECG Data Encryption Then Compression Using Singular Value Decomposition.
IEEE J. Biomed. Health Informatics, 2018

An FPGA Implementation of Lossless ECG Compressors Based on Multi-Stage Huffman Coding.
Proceedings of the IEEE 7th Global Conference on Consumer Electronics, 2018

2016
A low cost fleet management system with real time video surveillance using peer-to-peer connection.
Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

2015
Assessing and counteracting the effects of interference on GNSS signals.
Proceedings of the IEEE 4th Global Conference on Consumer Electronics, 2015

2013
Implementation of trigonometric custom functions hardware on embedded processor.
Proceedings of the IEEE 2nd Global Conference on Consumer Electronics, 2013

2012
A parallel decimal adder with carry correction during binary accumulation.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

2011
Enhance hardware security using FIFO in pipelines.
Proceedings of the 7th International Conference on Information Assurance and Security, 2011

2010
A decimal squarer with efficient partial product generation.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

2009
Design Optimization and Automation for Secure Cryptographic Circuits.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

2007
Optimal Allocation of I/O Device Parameters in Hardware and Software Codesign Methodology.
Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2007

Overcoming glitches and dissipation timing skews in design of DPA-resistant cryptographic hardware.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Cooptimization of interface hardware and software for I/O controllers.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Design and Implementation of a Schedulable DMAC on an AMBA-Based SOPC Platform.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
A hardware/software codesign approach for programmable IO devices.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

2004
On the formulation of software cost for IO devices.
Proceedings of the IASTED Conference on Software Engineering and Applications, 2004


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