Kwang-Ki Ryoo

According to our database1, Kwang-Ki Ryoo authored at least 24 papers between 2008 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
A Lightweight System-On-Chip Based Cryptographic Core for Low-Cost Devices.
Sensors, 2022

2021
NIST Lightweight Cryptography Standardization Process: Classification of Second Round Candidates, Open Challenges, and Recommendations.
J. Inf. Process. Syst., 2021

2019
Selecting a Synthesizable RISC-V Processor Core for Low-cost Hardware Devices.
J. Inf. Process. Syst., 2019

2018
Hardware Design of HEVC In-Loop Filter for Ultra-HD Video Encoding.
Proceedings of the Advanced Multimedia and Ubiquitous Engineering, 2018

Area-Efficient Design of Modular Exponentiation Using Montgomery Multiplier for RSA Cryptosystem.
Proceedings of the Advanced Multimedia and Ubiquitous Engineering, 2018

Hardware Architecture Design of AES Cryptosystem with 163-Bit Elliptic Curve.
Proceedings of the Advanced Multimedia and Ubiquitous Engineering, 2018

Efficient Hardware Architecture Design of Adaptive Search Range for Video Encoding.
Proceedings of the Advanced Multimedia and Ubiquitous Engineering, 2018

Design of Cryptographic Core for Protecting Low Cost IoT Devices.
Proceedings of the Advanced Multimedia and Ubiquitous Engineering, 2018

Efficient Integrated Circuit Design for High Throughput AES.
Proceedings of the Advanced Multimedia and Ubiquitous Engineering, 2018

2017
Variable Gain Potentiostat Architecture for Glucose Sensing from Blood and Tear Fluid.
J. Low Power Electron., 2017

2015
High-Aspect-Ratio Nanoscale Patterning in a Negative Tone Photoresist.
J. Inform. and Commun. Convergence Engineering, 2015

Visible Wavelength Photonic Insulator for Enhancing LED Light Emission.
J. Inform. and Commun. Convergence Engineering, 2015

2014
A CMOS Switched Capacitor Based Low Power Amperometric Readout Circuit for Microneedle Glucose Sensor.
J. Low Power Electron., 2014

A Compact CMOS Electrochemical Sensor Readout Circuit for a Conductometric Sensor Array.
J. Low Power Electron., 2014

2013
An Efficient Interpolation Hardware Architecture for HEVC Inter-Prediction Decoding.
J. Inform. and Commun. Convergence Engineering, 2013

A Performance-Oriented Intra-Prediction Hardware Design for H.264/AVC.
J. Inform. and Commun. Convergence Engineering, 2013

The hardware design of effective SAO for HEVC decoder.
Proceedings of the IEEE 2nd Global Conference on Consumer Electronics, 2013

High performance hardware architecture for multi-mode 1-D forward transform of HEVC.
Proceedings of the IEEE 2nd Global Conference on Consumer Electronics, 2013

2012
Performance Improvement and Power Consumption Reduction of an Embedded RISC Core.
J. Inform. and Commun. Convergence Engineering, 2012

2010
A design of high-performance pipelined architecture for H.264/AVC CAVLC decoder and low-power implementation.
IEEE Trans. Consumer Electron., 2010

An advanced H.264/AVC CAVLC decoding architecture for low power implementation.
Proceedings of the International Conference on Networked Computing and Advanced Information Management, 2010

2008
Clock Routing Synthesis for Nanometer IC Design.
J. Inform. and Commun. Convergence Engineering, 2008

The Development of Reusable SoC Platform based on OpenCores Soft Processor for HW/SW Codesign.
J. Inform. and Commun. Convergence Engineering, 2008

Design of Multimedia SoC Platform with a Crossbar On-Chip Bus for Embedded Systems.
Proceedings of the NCM 2008, The Fourth International Conference on Networked Computing and Advanced Information Management, Gyeongju, Korea, September 2-4, 2008, 2008


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