Lei Yang

According to our database, Lei Yang authored at least 6 papers between 2003 and 2006.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2006

Code construction and FPGA implementation of a low-error-floor multi-rate low-density Parity-check code decoder.

Lei Yang, Hui Liu, C.-J. Richard Shi

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

FROSTY: A program for fast extraction of high-level structural representation from circuit description for industrial CMOS circuits.

Lei Yang, C.-J. Richard Shi

Integr., 2006

2005

Noise aware behavioral modeling of the E-Delta fractional-N frequency synthesizer.

Lei Yang, Cherry Wakayama, C.-J. Richard Shi

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

VLSI implementation of a low-error-floor and capacity-approaching low-density parity-check code decoder with multi-rate capacity.

Lei Yang, Hui Liu, C.-J. Richard Shi

Proceedings of the Global Telecommunications Conference, 2005. GLOBECOM '05, St. Louis, Missouri, USA, 28 November, 2005

An FPGA implementation of low-density parity-check code decoder with multi-rate capability.

Lei Yang, Manyuan Shen, Hui Liu, C.-J. Richard Shi

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2003

FROSTY: A Fast Hierarchy Extractor for Industrial CMOS Circuits.

Lei Yang, C.-J. Richard Shi

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003