M. K. Aparna Nair

Orcid: 0000-0002-0575-0850

According to our database1, M. K. Aparna Nair authored at least 3 papers between 2021 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2022
Hardware Implementation of Network Interface Architecture for RISC-V based NoC-MPSoC Framework.
Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

Implementation and Analysis of Convolution Image Filtering with RISC-V Based Architecture.
Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

2021
Architectural Implementation of a Reconfigurable NoC Design for Multi-Applications.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021


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