M. V. Vaidyan

According to our database, M. V. Vaidyan authored at least 4 papers between 2013 and 2015.

Collaborative distances:

• Dijkstra number of seven.
• Erdős number of six.

2015

Estimator based controllers for hybrid systems with uncertainties - an experimental validation.

Shijoh Vellayikot, M. V. Vaidyan

Proceedings of the 2015 International Conference on Advances in Computing, 2015

2014

An FPGA-based parallel architecture for on-line parameter estimation using the RLS identification algorithm.

T. Ananthan, M. V. Vaidyan

Microprocess. Microsystems, 2014

2013

A Reconfigurable Parallel Hardware Implementation of the Self-Tuning Regulator.

T. Ananthan, M. V. Vaidyan

ACM Trans. Reconfigurable Technol. Syst., 2013

FPGA-based parallel architecture for PID control algorithm and HDL co-simulation.

T. Ananthan, M. V. Vaidyan

Int. J. Embed. Syst., 2013