Mandar Padmawar

According to our database, Mandar Padmawar authored at least 2 papers in 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

Microprocessor Power Supply Noise Aware Floorplanning Using a Circuit-Architectural Framework.

Mandar Padmawar, Sanghamitra Roy, Koushik Chakraborty

J. Low Power Electron., 2011

Integrated circuit-architectural framework for PSN aware floorplanning in microprocessors.

Mandar Padmawar, Sanghamitra Roy, Koushik Chakraborty

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011