Marc Schlickling

According to our database1, Marc Schlickling authored at least 9 papers between 2005 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
Timing model derivation: static analysis of hardware description languages.
PhD thesis, 2013

Confidence in Timing.
Proceedings of the SAFECOMP 2013, 2013

2012
Meeting Real-Time Requirements with Multi-core Processors.
Proceedings of the Computer Safety, Reliability, and Security, 2012

2010
Semi-automatic derivation of timing models for WCET analysis.
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, 2010

2009
Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

2008
Timing Validation of Automotive Software.
Proceedings of the Leveraging Applications of Formal Methods, 2008

2007
A Framework for Static Analysis of VHDL Code.
Proceedings of the 7th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2007

2006
New Developments in WCET Analysis.
Proceedings of the Program Analysis and Compilation, 2006

2005
05451 Group 5 -- Bananas, Dark Worlds, and AspectH.
Proceedings of the Beyond Program Slicing, 06.11. - 11.11.2005, 2005


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