Mariano López-García

Orcid: 0000-0002-5556-233X

According to our database1, Mariano López-García authored at least 28 papers between 1997 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2025
A fast method for finding separable Goppa polynomials used in post-quantum McEliece-based cryptography.
EURASIP J. Inf. Secur., December, 2025

Converting Fixed-Length Binary Strings Into Constant Weight Words: Application on Post-Quantum Cryptography.
IEEE Trans. Dependable Secur. Comput., 2025

AXI Hardware Accelerator for McEliece on FPGA Embedded Systems.
IEEE Trans. Dependable Secur. Comput., 2025

Post-Quantum Authentication Framework Based on Iris Recognition and Homomorphic Encryption.
IEEE Access, 2025

2018
Hardware Architecture Implemented on FPGA for Protecting Cryptographic Keys against Side-Channel Attacks.
IEEE Trans. Dependable Secur. Comput., 2018

Floating-point accelerator for biometric recognition on FPGA embedded systems.
J. Parallel Distributed Comput., 2018

2016
A new countermeasure against side-channel attacks based on hardware-software co-design.
Microprocess. Microsystems, 2016

2015
Flexible Biometric Online Speaker-Verification System Implemented on FPGA Using Vector Floating-Point Units.
IEEE Trans. Very Large Scale Integr. Syst., 2015

2014
Embedded System for Biometric Online Signature Verification.
IEEE Trans. Ind. Informatics, 2014

Implementation on MicroBlaze of AES algorithm to reveal fake keys against side-channel attacks.
Proceedings of the 23rd IEEE International Symposium on Industrial Electronics, 2014

2013
Real-Time Speaker Verification System Implemented on Reconfigurable Hardware.
J. Signal Process. Syst., 2013

Fast Self-Reconfigurable Embedded System on Spartan-3.
J. Univers. Comput. Sci., 2013

Real-time embedded systems powered by FPGA dynamic partial self-reconfiguration: a case study oriented to biometric recognition applications.
J. Real Time Image Process., 2013

2012
Deployment of Run-Time Reconfigurable Hardware Coprocessors Into Compute-Intensive Embedded Applications.
J. Signal Process. Syst., 2012

FPGA-based Personal Authentication Using Fingerprints.
J. Signal Process. Syst., 2012

2011
Hardware-software co-design of an iris recognition algorithm.
IET Inf. Secur., 2011

2009
SVM speaker verification system based on a low-cost FPGA.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Acceleration of complex algorithms on a fast reconfigurable embedded system on Spartan-3.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008
Self-recofigurable embedded systems on Spartan-3.
Proceedings of the FPL 2008, 2008

2007
Design of a hardware accelerator for fingerprint alignment.
Proceedings of the FPL 2007, 2007

2006
FPGA Implementation of a Ridge Extraction Fingerprint Algorithm Based on Microblaze and Hardware Coprocessor.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Dynamically Reconfigurable CORDIC Coprocessor for Trigonometric.
Proceedings of the ARCS 2006, 2006

Trigonometric Computing Embedded in a Dynamically Reconfigurable CORDIC System-on-Chip.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

2005
Hardware-Software Codesign of a Fingerprint Identification Algorithm.
Proceedings of the Audio- and Video-Based Biometric Person Authentication, 2005

2004
Current distribution control design for paralleled DC/DC converters using sliding-mode control.
IEEE Trans. Ind. Electron., 2004

FPGA Implementation of the Ridge Line Following Fingerprint Algorithm.
Proceedings of the Field Programmable Logic and Application, 2004

1999
Sliding-mode-control design of a high-power-factor buck-boost rectifier.
IEEE Trans. Ind. Electron., 1999

1997
A Fuzzy Controller for Switching Regulators with Programmable Control Surfaces.
Proceedings of the Biological and Artificial Computation: From Neuroscience to Technology, 1997


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