Mark J. Cianchetti

According to our database1, Mark J. Cianchetti authored at least 3 papers between 2008 and 2011.

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Bibliography

2011
A low-latency, high-throughput on-chip optical router architecture for future chip multiprocessors.
ACM J. Emerg. Technol. Comput. Syst., 2011

2009
Phastlane: a rapid transit optical routing network.
Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

2008
Shared reconfigurable architectures for CMPS.
Proceedings of the FPL 2008, 2008


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