Mark W. Goudreau

According to our database1, Mark W. Goudreau authored at least 13 papers between 1991 and 2000.

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Bibliography

2000
Scheduling Algorithms for Input-Queued Switches: Randomized Techniques and Experimental Evaluation.
Proceedings of the Proceedings IEEE INFOCOM 2000, 2000

1999
Portable and Efficient Parallel Computing Using the BSP Model.
IEEE Trans. Computers, 1999

BOS is Boss: A Case for Bulk-Synchronous Object Systems.
Proceedings of the Eleventh Annual ACM Symposium on Parallel Algorithms and Architectures, 1999

1998
BSPlib: The BSP programming library.
Parallel Comput., 1998

1996
A bulk-synchronous parallel library implementation for the BBN butterfly GP1000.
Proceedings of the Eighth IEEE Symposium on Parallel and Distributed Processing, 1996

Towards Efficiency and Portability: Programming with the BSP Model.
Proceedings of the 8th Annual ACM Symposium on Parallel Algorithms and Architectures, 1996

1995
Constructive learning of recurrent neural networks: limitations of recurrent cascade correlation and a simple solution.
IEEE Trans. Neural Networks, 1995

Using recurrent neural networks to learn the structure of interconnection networks.
Neural Networks, 1995

Efficient communication using total-exchange.
Proceedings of IPPS '95, 1995

1994
First-order versus second-order single-layer recurrent neural networks.
IEEE Trans. Neural Networks, 1994

1993
Constructive learning of recurrent neural networks.
Proceedings of International Conference on Neural Networks (ICNN'88), San Francisco, CA, USA, March 28, 1993

1992
Routing in Random Multistage Interconnections Networks: Comparing Exhaustive Search, Greedy and Neural Network Approaches.
Int. J. Neural Syst., 1992

1991
Neural Network Routing for Random Multistage Interconnection Networks.
Proceedings of the Advances in Neural Information Processing Systems 4, 1991


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