Markus Zannoth

According to our database, Markus Zannoth authored at least 5 papers between 1998 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

Gate driver with 10 / 15ns in-transition variable drive current and 60% reduced current dip.

Alexis Schindler, Benno Koeppl, Ansgar Pottbaecker, Markus Zannoth, Bernhard Wicht

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

2008

A Quad-Band GSM/EDGE-Compliant SiGe-Bipolar Power Amplifier.

Winfried Bakalski, Bernhard Sogl, Markus Zannoth, Michael Asam, Boris Kapfelsperger, Jörg Berkner, Bernd Eisener, Wolfgang Thomann, Siegfried Marcon, Wilfried Osterreicher, Ewa Napieralska, Erwin Rampf, Arpad L. Scholtz, Bernd-Ulrich Klepser

IEEE J. Solid State Circuits, 2008

2004

A highly integrated dual-band multimode wireless LAN transceiver.

Markus Zannoth, Thomas Rühlicke, Bernd-Ulrich Klepser

IEEE J. Solid State Circuits, 2004

2003

A highly integrated, dual-band, multi-mode wireless LAN transceiver.

Thomas Rühlicke, Markus Zannoth, Bernd-Ulrich Klepser

Proceedings of the ESSCIRC 2003, 2003

1998

A fully integrated VCO at 2 GHz.

Markus Zannoth, Bernd Kolb, Joseph Fenk, Robert Weigel

IEEE J. Solid State Circuits, 1998