Maryna Miroschnyk

Orcid: 0000-0002-2231-2529

According to our database1, Maryna Miroschnyk authored at least 7 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
In-Memory Fault as Address Simulation.
Proceedings of the IEEE East-West Design & Test Symposium, 2023

Overview of the modern SoC design technologies and open softprocessor architectures.
Proceedings of the 13th International Conference on Dependable Systems, 2023

2020
Hardware Implementation of Timed Logical Control FSM.
Proceedings of the IEEE East-West Design & Test Symposium, 2020

Verification of FPGA control systems by analyzing the correctness of state diagrams.
Proceedings of the 11th IEEE International Conference on Dependable Systems, 2020

2019
Design of Real-Time System Logic Control on FPGA.
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

2018
Design of Logical Control Units Based on Finite State Machines' Patterns.
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

2017
Design automation of testable finite state machines.
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017


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