Masa'aki Tan'no

According to our database, Masa'aki Tan'no authored at least 2 papers between 1989 and 2006.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2006

A 0.5-V 25-MHz 1-mW 256-kb MTCMOS/SOI SRAM for solar-power-operated portable personal digital equipment - sure write operation by using step-down negatively overdriven bitline scheme.

Nobutaro Shibata, Hiroshi Kiya, Shigehiro Kurita, Hidetaka Okamoto, Masa'aki Tan'no, Takakuni Douseki

IEEE J. Solid State Circuits, 2006

1989

A 20 kbit associative memory LSI for artificial intelligence machines.

Takeshi Ogura, Junzo Yamada, Shin-Ichiro Yamada, Masa'aki Tan'no

IEEE J. Solid State Circuits, August, 1989