Masahiko Kashimura

According to our database1, Masahiko Kashimura authored at least 2 papers between 1991 and 1992.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1992
Fault-tolerant architecture in a cache memory control LSI.
IEEE J. Solid State Circuits, April, 1992

1991
Two-Dimensional Layout Synthesis for Large-Scale CMOS Circuits.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991


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