Mathieu Faverge

Orcid: 0000-0002-2128-1230

According to our database1, Mathieu Faverge authored at least 39 papers between 2009 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Programming heterogeneous architectures using hierarchical tasks.
Concurr. Comput. Pract. Exp., 2023

On the Arithmetic Intensity of Distributed-Memory Dense Matrix Multiplication Involving a Symmetric Input Matrix (SYMM).
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

2021
Deciding Non-Compressible Blocks in Sparse Direct Solvers using Incomplete Factorization.
Proceedings of the 28th IEEE International Conference on High Performance Computing, 2021

2020
Tiled Algorithms for Efficient Task-Parallel ℌ-Matrix Solvers.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

Improving Mapping for Sparse Direct Solvers - A Trade-Off Between Data Locality and Load Balancing.
Proceedings of the Euro-Par 2020: Parallel Processing, 2020

2019
Efficient parallel solution of the 3D stationary Boltzmann transport equation for diffusive problems.
J. Comput. Phys., 2019

Leveraging Task-Based Polar Decomposition Using PARSEC on Massively Parallel Systems.
Proceedings of the 2019 IEEE International Conference on Cluster Computing, 2019

2018
Asynchronous Task-Based Polar Decomposition on Single Node Manycore Architectures.
IEEE Trans. Parallel Distributed Syst., 2018

Sparse supernodal solver using block low-rank compression: Design, performance and analysis.
J. Comput. Sci., 2018

Evaluation of dataflow programming models for electronic structure theory.
Concurr. Comput. Pract. Exp., 2018

2017
Reordering Strategy for Blocking Optimization in Sparse Linear Solvers.
SIAM J. Matrix Anal. Appl., 2017

Sparse Supernodal Solver Using Block Low-Rank Compression.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Bidiagonalization and R-Bidiagonalization: Parallel Tiled Algorithms, Critical Paths and Distributed-Memory Implementation.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium, 2017

2016
Bidiagonalization with Parallel Tiled Algorithms.
CoRR, 2016

2015
Mixing LU and QR factorization algorithms to design high-performance dense linear algebra solvers.
J. Parallel Distributed Comput., 2015

A survey of recent developments in parallel implementations of Gaussian elimination.
Concurr. Comput. Pract. Exp., 2015

Hierarchical DAG Scheduling for Hybrid Distributed Systems.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium, 2015

Divide and Conquer Symmetric Tridiagonal Eigensolver for Multicore Architectures.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium, 2015

3D Cartesian Transport Sweep for Massively Parallel Architectures with PaRSEC.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium, 2015

2014
Achieving numerical accuracy and high performance using recursive tile LU factorization with partial pivoting.
Concurr. Comput. Pract. Exp., 2014

Taking Advantage of Hybrid Systems for Sparse Direct Solvers via Task-Based Runtimes.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Designing LU-QR Hybrid Solvers for Performance and Stability.
Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

Parallel 3D Sweep Kernel with PARSEC.
Proceedings of the 2014 IEEE International Conference on High Performance Computing and Communications, 2014

2013
LU Factorization with Partial Pivoting for a Multicore System with Accelerators.
IEEE Trans. Parallel Distributed Syst., 2013

Hierarchical QR factorization algorithms for multi-core clusters.
Parallel Comput., 2013

PaRSEC: Exploiting Heterogeneity to Enhance Scalability.
Comput. Sci. Eng., 2013

Implementing a Systolic Algorithm for QR Factorization on Multicore Clusters with PaRSEC.
Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

2012
Programming the LU Factorization for a Multicore System with Accelerators.
Proceedings of the High Performance Computing for Computational Science, 2012



Hierarchical QR Factorization Algorithms for Multi-core Cluster Systems.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012

2011
High performance matrix inversion based on LU factorization for multicore architectures.
Proceedings of the 2011 ACM International Workshop on Many Task Computing on Grids and Supercomputers, 2011

An Open-Source Tool-Chain for Performance Analysis.
Proceedings of the Tools for High Performance Computing 2011, 2011

Exploiting Fine-Grain Parallelism in Recursive LU Factorization.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

Flexible Development of Dense Linear Algebra Algorithms on Massively Parallel Architectures with DPLASMA.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

QR Factorization on a Multicore Node Enhanced with Multiple GPU Accelerators.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

EZTrace: A Generic Framework for Performance Analysis.
Proceedings of the 11th IEEE/ACM International Symposium on Cluster, 2011

LU factorization for accelerator-based systems.
Proceedings of the 9th IEEE/ACS International Conference on Computer Systems and Applications, 2011

2009
Ordonnancement hybride statique-dynamique en algèbre linéaire creuse pour de grands clusters de machines NUMA et multi-cœurs. (Static-Dynamic Hybrid Scheduling in sparse linear algebra for large clusters of NUMA and multi-cores architectures).
PhD thesis, 2009


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