Merih Yildiz

According to our database, Merih Yildiz authored at least 9 papers between 2006 and 2014.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2014

Negative impedance inverter and all-pass filter realizations using adder and subtractor blocks.

Shahram Minaei, Merih Yildiz, Izzet Cem Göknar, Erkan Yüce

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2013

Pulse Width Modulation using a recently developed CMOS core circuit.

Izzet Cem Göknar, Shahram Minaei, Merih Yildiz, Ergul Akcakaya

Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2012

Neural CMOS-Integrated Circuit and Its Application to Data Classification.

Izzet Cem Göknar, Merih Yildiz, Shahram Minaei, Engin Deniz

IEEE Trans. Neural Networks Learn. Syst., 2012

2011

High-slew Rate Low-Quiescent Current rail-to-rail CMOS Buffer amplifier for Flat Panel Displays.

Merih Yildiz, Shahram Minaei, Emre Arslan

J. Circuits Syst. Comput., 2011

A flexible current-mode classifier circuit and its applications.

Merih Yildiz, Shahram Minaei, Izzet Cem Göknar

Int. J. Circuit Theory Appl., 2011

DU-TCC 1209: A CMOS IC classifier and its application to IRIS data.

Merih Yildiz, Izzet Cem Göknar, Shahram Minaei, Engin Deniz

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2007

A CMOS Classifier Circuit Using Neural Networks With Novel Architecture.

Merih Yildiz, Shahram Minaei, Izzet Cem Göknar

IEEE Trans. Neural Networks, 2007

A low-power multilevel-output classifier circuit.

Merih Yildiz, Shahram Minaei, Izzet Cem Göknar

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006

CMOS Realization of a Quantized-Output Classifier Circuit.

Merih Yildiz, Shahram Minaei, Izzet Cem Göknar

Proceedings of the 13th IEEE International Conference on Electronics, 2006