Min Li

Affiliations:
  • Virginia Tech, Blacksburg, VA, USA


According to our database1, Min Li authored at least 9 papers between 2009 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2012
Acceleration of Hardware Testing and Validation Algorithms using Graphics Processing Units.
PhD thesis, 2012

Design validation of RTL circuits using evolutionary swarm intelligence.
Proceedings of the 2012 IEEE International Test Conference, 2012

RAG: An efficient reliability analysis of logic circuits on graphics processing units.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
3-D Parallel Fault Simulation With GPGPU.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Utilizing GPGPUs for design validation with a modified Ant Colony Optimization.
Proceedings of the 2011 IEEE International High Level Design Validation and Test Workshop, 2011

High-Performance Diagnostic Fault Simulation on GPUs.
Proceedings of the 16th European Test Symposium, 2011

2010
Reversible logic synthesis through ant colony optimization.
Proceedings of the Design, Automation and Test in Europe, 2010

FSimGP^2: An Efficient Fault Simulator with GPGPU.
Proceedings of the 19th IEEE Asian Test Symposium, 2010

2009
An ant colony optimization technique for abstraction-guided state justification.
Proceedings of the 2009 IEEE International Test Conference, 2009


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