Mohamed Mohamedin

Orcid: 0000-0003-0246-4629

According to our database1, Mohamed Mohamedin authored at least 12 papers between 2012 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2018
Nemo: NUMA-aware Concurrency Control for Scalable Transactional Memory.
Proceedings of the 47th International Conference on Parallel Processing, 2018

2017
Managing Resource Limitation of Best-Effort HTM.
IEEE Trans. Parallel Distributed Syst., 2017

Shield: A middleware to tolerate CPU transient faults in multicore architectures.
Proceedings of the 16th IEEE International Symposium on Network Computing and Applications, 2017

2016
On designing NUMA-aware concurrency control for scalable transactional memory.
Proceedings of the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2016

2015
On Optimizing Transactional Memory: Transaction Splitting, Scheduling, Fine-grained Fallback, and NUMA Optimization.
PhD thesis, 2015

Brief Announcement: On Scheduling Best-Effort HTM Transactions.
Proceedings of the 27th ACM on Symposium on Parallelism in Algorithms and Architectures, 2015

Brief Announcement: Managing Resource Limitation of Best-Effort HTM.
Proceedings of the 27th ACM on Symposium on Parallelism in Algorithms and Architectures, 2015

On Preserving Data Integrity of Transactional Applications on Multicore Architectures.
Proceedings of the 35th IEEE International Conference on Distributed Computing Systems, 2015

2014
On Making Transactional Applications Resilient to Data Corruption Faults.
Proceedings of the 2014 IEEE 13th International Symposium on Network Computing and Applications, 2014

Managing Soft-Errors in Transactional Systems.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

2013
ByteSTM: Virtual Machine-Level Java Software Transactional Memory.
Proceedings of the Coordination Models and Languages, 15th International Conference, 2013

2012
HydraVM: Extracting Parallelism from Legacy Sequential Code Using STM.
Proceedings of the 4th USENIX Workshop on Hot Topics in Parallelism, 2012


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