Mohammad Moradinezhad Maryan

According to our database, Mohammad Moradinezhad Maryan authored at least 7 papers between 2017 and 2022.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2022

A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22 nm CMOS process.

Mohammad Moradinezhad Maryan, Seyed Javad Azhari, Majid Amini Valashani

Integr., 2022

2021

An input controlled leakage restrainer transistor-based technique for leakage and short-circuit power reduction of 1-bit hybrid full adders.

Mohammad Moradinezhad Maryan, Majid Amini Valashani, Seyed Javad Azhari

Int. J. Circuit Theory Appl., 2021

A New Circuit-Level Technique for Leakage and Short-Circuit Power Reduction of Static Logic Gates in 22-nm CMOS Technology.

Mohammad Moradinezhad Maryan, Majid Amini Valashani, Seyed Javad Azhari

Circuits Syst. Signal Process., 2021

2020

Compact Design of High-Speed Low-Error Four-Quadrant Current Multiplier with Reduced Power Dissipation.

Mohammad Moradinezhad Maryan, Seyed Javad Azhari, Mehdi Ayat, Reza Rezaei Siahrood

J. Circuits Syst. Comput., 2020

A high-precision current-mode multifunction analog cell suitable for computational signal processing.

Mohammad Moradinezhad Maryan, Reza Rezaei Siahrood, Seyed Javad Azhari, Abdolreza Rahmati

Integr., 2020

2018

CMOS design of computational current-mode static and dynamic functions based on analog translinear cell.

Mohammad Moradinezhad Maryan, Seyed Javad Azhari

Comput. Electr. Eng., 2018

2017

Ultra low-power low-voltage FGMOS based-configurable analog block for current-mode fractional-power functions.

Mohammad Moradinezhad Maryan, Seyed Javad Azhari

Microelectron. J., 2017