Mohmad Aasif Bhat

According to our database, Mohmad Aasif Bhat authored at least 4 papers between 2023 and 2026.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2026

A 3-5.5 GHz Compact, Power-Efficient, Switched LC Delay-Line With 0.2-1.1 ns Delay Range.

Mohmad Aasif Bhat, Imon Mondal

IEEE J. Solid State Circuits, April, 2026

33.6 A Frequency-Translated, 1-to-5GHz Centred, All-Passive, Programmable-Bandwidth, Switched-Capacitor Delay Line with 6.5-to-8.2dB Delay-Independent Insertion Loss in 65nm CMOS.

Mohmad Aasif Bhat, Imon Mondal

Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2025

An LPTV Programmable Bandpass True-time-delay Line Without External Clock-phase Shifter.

Mohmad Aasif Bhat, Imon Mondal

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2023

A Low-Loss, Compact Wideband True-Time-Delay Line for Sub-6GHz Applications Using N - Path Filters.

Mohmad Aasif Bhat, Imon Mondal

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023