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Mrinal Kanti Mandal

Orcid: 0000-0002-3345-5250

Affiliations:
  • Indian Institute of Technology Kharagpur, Electronics and Electrical Communication Engineering Department, India
  • Ecole Polytechnique de Montréal, QC, Canada (2010 - 2012)
  • University of Quebec at Montreal, QC, Canada (2009 - 2010)
  • Indian Institute of Technology Kharagpur, India (PhD 2008)


According to our database1, Mrinal Kanti Mandal authored at least 6 papers between 2019 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
Design of a Class-J Power Amplifier with Reactive-Resistive Second Harmonic Termination for Improved Efficiency.
[BibTeX]
[DOI]
Mahima Patel
,
Sujay S
,
Debarati Sen
,
Mrinal Kanti Mandal
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2022
Novel patch selection based on object detection in HMAX for natural image classification.
[BibTeX]
[DOI]
Mohammadesmaeil Akbarpour
,
Mrinal Kanti Mandal
,
M. Hashemi Kamangar
Signal Image Video Process., 2022

2021
Parasitic Compensation and Hence Isolation Improvement of PIN Diode-Based Switches.
[BibTeX]
[DOI]
Abinash Singh
,
Mrinal Kanti Mandal
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
Electronically Tunable Reflection Type Phase Shifters.
[BibTeX]
[DOI]
Abinash Singh
,
Mrinal Kanti Mandal
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Reconfigurable RF Dispersive Delay Circuits by Stepped Impedance Shunt Stubs.
[BibTeX]
[DOI]
Joydeb Mandal
,
Mrinal Kanti Mandal
IEEE Trans. Circuits Syst. II Express Briefs, 2020

2019
Computer-Aided Design of a Switchable True Time Delay (TTD) Line With Shunt Open-Stubs.
[BibTeX]
[DOI]
Joydeb Mandal
,
Mrinal Kanti Mandal
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019


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