N. N. Levchenko

According to our database1, N. N. Levchenko authored at least 20 papers between 2011 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2021
Recovery of Parallel Dataflow Computing System From Faults and Failures.
Proceedings of the IEEE East-West Design & Test Symposium, 2021

2019
Reliability Issues in the Parallel Dataflow Computing System.
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

Implementation Variants of the Global Distributed Associative Computing Environment for the Parallel Dataflow Computing System "Buran".
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

Simulation of Nodes and Blocks of Matching Processor of the Parallel Dataflow Computing System "Buran".
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

Associative Processors: Application, Operation, Implementation Problems.
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

2018
Study of Execution Efficiency of Implementation Versions of Sparse Matrices Multiplication Algorithm on Parallel Dataflow Computing System "Buran".
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

Solutions to Problem of CAM Overflow in the Parallel Dataflow Computing System "Buran".
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

Formal Description of Possible Input Logical Signal Data Sequences for Digital Systems and Their Blocks.
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

Global Distributed Associative Environment - Evolution of Parallel Dataflow Computing System "Buran".
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

2017
Approaches to the development of various sets of nodes and blocks for the PDCS matching processor.
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

Investigation of sparse matrix multiplication task for the PDCS "Buran".
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

The current state of evolution of content addressable memory architecture and aspects of its usage in the PDCS "Buran".
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

Dataflow computing model - Perspectives, advantages and implementation.
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

2016
Development tools for high-performance computing systems using associative environment for computing process organization.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

I/O processor as the device for computing process management in the PDCS "Buran".
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

The PDCS "Buran" operating efficiency improvement ways.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

Research of asynchronous algorithm for molecular dynamics task on the PDCS "Buran" models.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

2013
Decreasing the power consumption of content-addressable memory in the dataflow parallel computing system.
Proceedings of the East-West Design & Test Symposium, 2013

2011
Debugging and testing features of the dataflow parallel computing system components and devices.
Proceedings of the 9th East-West Design & Test Symposium, 2011

Organization of pipeline operations in mapping unit of the dataflow parallel computing system.
Proceedings of the 9th East-West Design & Test Symposium, 2011


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