Nan-Hsiung Tseng

According to our database, Nan-Hsiung Tseng authored at least 4 papers between 2021 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

An Improved Common-Mode Transient Immunity Isolated Gate Driver With On-the-Fly Deadtime Control.

Yu-Jia Wei, Sheng Cheng Lee, Nan-Hsiung Tseng, Yung-Ching Yang, Shi-Jun Zeng, Ke-Horng Chen, Xi Zhu, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2025

A Two-Step Down Converter Based on Pseudo 4-Phase Mutual Operation for 48-to-1 Conversion.

Yu-Tse Shih, Li-Jen Huang, Nan-Hsiung Tseng, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2025

2024

Two-Phase Hybrid Buck-Boost Converter With Coupled-Inductors Under ZVS Operation for USB PD Bidirectional Conversion.

Yi-Ching Chiu, Nan-Hsiung Tseng, Chih-Cherng Liao, Hao-Wen Guan, Po-Shiun Chang, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2024

2021

A Series Stacked FinFET Structure for Digital Low Dropout Regulators with Minimum Energy Point Technique for 37.5% Energy Reduction in Cortex M0 Processor.

Nan-Hsiung Tseng, Bo-Kuan Wu, Tzu-Ping Huang, Cheng-Yen Lee, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021