Naveen Kr. Malik

According to our database¹, Naveen Kr. Malik authored at least 3 papers in 2012.

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2012

DSTN (Distributed Sleep Transistor Network) for Low Power Programmable Logic array Design

[BibT_eX]

[DOI]

CoRR, 2012

A Cost- Effective Design of Reversible Programmable Logic Array

[BibT_eX]

[DOI]

CoRR, 2012

Reversible Programmable Logic Array (RPLA) using Feynman & MUX Gates for Low Power Industrial Applications

[BibT_eX]

[DOI]

CoRR, 2012