Naveen Kumar Macha

Orcid: 0000-0002-0243-8124

According to our database1, Naveen Kumar Macha authored at least 17 papers between 2016 and 2023.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
A Neoteric Approach for Logic with Embedded Memory Leveraging Crosstalk Computing.
ACM J. Emerg. Technol. Comput. Syst., January, 2023

2022
Crosstalk-Computing-Based Gate-Level Reconfigurable Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2022

On circuit developments to enable large scale circuit design while computing with noise.
Integr., 2022

2021
Crosstalk Logic Circuits with Built-in Memory.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

2020
Crosstalk Noise based Configurable Computing: A New Paradigm for Digital Electronics.
CoRR, 2020

2019
New 3-D CMOS Fabric With Stacked Horizontal Nanowires.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Thermal management challenges and mitigation techniques for transistor-level 3-D integration.
Microelectron. J., 2019

A Logic Simplification Approach for Very Large Scale Crosstalk Circuit Designs.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019

Designing Crosstalk Circuits at 7nm.
Proceedings of the 2019 IEEE International Conference on Rebooting Computing, 2019

2018
Thermal Management in Fine-Grained 3-D Integrated Circuits.
CoRR, 2018

Crosstalk based Fine-Grained Reconfiguration Techniques for Polymorphic Circuits.
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

A Novel Analog to Digital Conversion Concept with Crosstalk Computing.
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

A New Paradigm for Fault-Tolerant Computing with Interconnect Crosstalks.
Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018

2017
Cost Modeling and Projection for Stacked Nanowire Fabric.
CoRR, 2017

Ultra high density 3D SRAM cell design in Stacked Horizontal Nanowire (SN3D) fabric.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

A New Concept for Computing Using Interconnect Crosstalks.
Proceedings of the IEEE International Conference on Rebooting Computing, 2017

2016
Fine-grained 3-D CMOS concept using stacked horizontal nanowire.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016


  Loading...