Nick Petrovsky
Orcid: 0000-0001-5807-8685
According to our database1,
Nick Petrovsky
authored at least 15 papers
between 2014 and 2023.
Collaborative distances:
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Bibliography
2023
Improving Spatial Resolution of First-order Ambisonics Using Sparse MDCT Representation.
CoRR, 2023
2020
High performance multiplier-less pipelined FPGA architecture for 2-D non-separable quaternionic filter banks.
Proceedings of the Signal Processing: Algorithms, 2020
2019
2-D non-separable integer implementation of paraunitary filter bank based on the quaternionic multiplier block-lifting structure.
Proceedings of the 27th European Signal Processing Conference, 2019
2018
Proceedings of the Signal Processing: Algorithms, 2018
2017
Embedded distributed arithmetic based quaternions multiplier of paraunitary filter bank for lossless-to-lossy image coding.
Microprocess. Microsystems, 2017
Petralex: A smartphone-based real-time digital hearing aid with combined noise reduction and acoustic feedback suppression.
Proceedings of the Signal Processing: Algorithms, 2017
Design and implementation of reversible integer quaternionic paraunitary filter banks on adder-based distributed arithmetic.
Proceedings of the Signal Processing: Algorithms, 2017
Multiplierless structurally orthogonal block-lifting-based quaternionic paraunitary filter banks with sum-of-powers-of-two coefficients.
Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017
Structurally orthogonal finite precision FPGA implementation of block-lifting-based quaternionic paraunitary filter banks for L2L image coding.
Proceedings of the 22nd International Conference on Digital Signal Processing, 2017
Real-time implementation of hearing aid with combined noise and acoustic feedback reduction based on smartphone.
Proceedings of the 2017 IEEE International Conference on Acoustics, 2017
2016
CORDIC-lifting factorization of paraunitary filter banks based on the quaternionic multipliers for lossless image coding.
Multidimens. Syst. Signal Process., 2016
Pipelined block-lifting-based embedded processor for multiplying quaternions using distributed arithmetic.
Proceedings of the 5th Mediterranean Conference on Embedded Computing, 2016
2015
Design and high-performance hardware architecture for image coding using block-lifting-based quaternionic paraunitary filter banks.
Proceedings of the 4th Mediterranean Conference on Embedded Computing, 2015
FPSoC using Xilinx Zynq for medical image coding based on the quaternionic paraunitary filter banks.
Proceedings of the 17th International Conference on E-health Networking, 2015
2014
Structurally orthogonal finite precision implementation quaternionic based paraunitary filter bank.
Proceedings of the International Conference on Audio, 2014