Nobuharu Yazawa

According to our database, Nobuharu Yazawa authored at least 4 papers between 1988 and 1991.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1991

A 10-b 70-MS/s CMOS D/A converter.

Yasuyuki Nakamura, Takahiro Miki, Atsushi Maeda, Harufusa Kondoh, Nobuharu Yazawa

IEEE J. Solid State Circuits, April, 1991

1990

A 30-MHz mixed analog/digital signal processor.

Sumitaka Takeuchi, Hiroyuki Kouno, Yoshinori Hayashi, Atsushi Maeda, Keisuke Okada, Nobuharu Yazawa

IEEE J. Solid State Circuits, December, 1990

An 8-bit 20-MS/s CMOS A/D converter with 50-mW power consumption.

Shiro Hosotani, Takahiro Miki, Atsushi Maeda, Nobuharu Yazawa

IEEE J. Solid State Circuits, February, 1990

1988

An SOI structure for flash A/D converter.

Toshio Kumamoto, Masao Nakaya, Shigeru Kusunoki, Tadashi Nishimura, Nobuharu Yazawa, Yoichi Akasaka, Yasutaka Horiba

IEEE J. Solid State Circuits, February, 1988