Pablo Vizcaino

According to our database, Pablo Vizcaino authored at least 9 papers between 2020 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Designing a QEMU plugin to profile multicore long vector RISC-V architectures: RAVE.

Pablo Vizcaino, Roger Ferrer, Jesús Labarta, Filippo Mantovani

Future Gener. Comput. Syst., 2026

2024

RAVE: RISC-V Analyzer of Vector Executions, A QEMU Tracing Plugin.

Pablo Vizcaino, Filippo Mantovani, Jesús Labarta, Roger Ferrer

Proceedings of the Parallel Processing and Applied Mathematics, 2024

QR Factorization on a Long-Vector Processor.

Andrés E. Tomás, Pablo Vizcaino, Enrique S. Quintana-Ortí, Filippo Mantovani

Proceedings of the Parallel Processing and Applied Mathematics, 2024

Graph Computing on Long Vector Architectures (Yes, It Works!).

Pablo Vizcaino, Jesús Labarta, Filippo Mantovani

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

2023

Acceleration with long vector architectures: Implementation and evaluation of the FFT kernel on NEC SX-Aurora and RISC-V vector extension.

Pablo Vizcaino, Filippo Mantovani, Roger Ferrer, Jesús Labarta

Concurr. Comput. Pract. Exp., 2023

Software Development Vehicles to Enable Extended and Early Co-design: A RISC-V and HPC Case of Study.

Filippo Mantovani, Pablo Vizcaino, Fabio Banchelli, Marta Garcia-Gasulla, Roger Ferrer, Georgios Ieronymakis, Nikolaos Dimou, Vassilis Papaefstathiou, Jesús Labarta

Proceedings of the High Performance Computing, 2023

Short Reasons for Long Vectors in HPC CPUs: A Study Based on RISC-V.

Pablo Vizcaino, Georgios Ieronymakis, Nikolaos Dimou, Vassilis Papaefstathiou, Jesús Labarta, Filippo Mantovani

Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

2021

Accelerating FFT Using NEC SX-Aurora Vector Engine.

Pablo Vizcaino, Filippo Mantovani, Jesús Labarta

Proceedings of the Euro-Par 2021: Parallel Processing Workshops, 2021

2020

Performance study of HPC applications on an Arm-based cluster using a generic efficiency model.

Fabio Banchelli, Kilian Peiro, Andrea Querol, Guillem Ramirez-Gargallo, Guillem Ramirez-Miranda, Joan Vinyals, Pablo Vizcaino, Marta Garcia-Gasulla, Filippo Mantovani

Proceedings of the 28th Euromicro International Conference on Parallel, 2020